What is the maximal binary number that this counter can count?What happens in the code if the positive edge of the reset signal and the positive edge of the reset signal happen at the same time.What is the initial value of the counter? Explain your answer.

Experimental Work (student’s work starts here)

Run the code given in practice example 1 in the online simulator and insert a screenshot of the output. Make sure to change the name of the instructor with your own name.

Answer the below questions for the Verilog code given in practice example 1.

What is the initial value of the counter? Explain your answer.

In which numbering system does this counter count: decimal or binary? Explain your answer.

What is the maximal binary number that this counter can count?

What happens in the code if the positive edge of the reset signal and the positive edge of the reset signal happen at the same time.

Modify the code given in practice example 1 so that it counts up from the binary sequence 0000 up to 1110. This counter should count every negative edge of the clock signal. The resent happens for a negative edge of the reset signal too.
Run the code in the online simulator and insert a screenshot of the output. Make sure to display your own name.

 

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